1. Field of the Invention
The invention relates to data flush methods, and more particularly, to data flush methods capable of preventing data inconsistency.
2. Description of the Related Art
Many computer systems incorporate at least two buses, one is commonly referred to as a memory bus for communication between a central processor and a main memory, and the other is known as a peripheral bus for communication between peripheral devices, such as graph systems, disk drives or local area networks (LANs). To allow data transfer between the buses, a bus bridge (hereinafter referred to as “bridge”) is utilized to bridge and couple the buses together.
The primary task of a bridge is to allow data to cross from one bus to the other bus without diminishing the performance of either bus. To perform this function, the bridge must be able to comprehend and participate in the bus protocol of each of the buses. In particular, the bridge must be able of serve both, in a slave capacity and a master capacity, such that it can accept a request from a first bus as a slave, then initiate an appropriate bus operation on the other bus as a master. The bridge must, therefore, provide access support for crossing between one bus and another bus.
Typically, a bridge utilizes data buffering such that data to be transferred through the bridge from either the memory bus or the peripheral bus is temporarily stored, or “posted”, within a data buffer. Posting data in a bridge can enhance the performance of the system by packetizing data and pre-fetching data, but can also introduce a problem of data consistency when synchronization events occur. When a synchronization event occurs and data remains posted in the bridge, data inconsistency may occur.